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The following page content corresponds to the products formerly marketed by NEC Electronics

Products > Microcontrollers > Product Lineup > 32-bit High-end General Purpose - Internal flash memory/mask ROM/ROMless type >

V850E2/ME3 Microcontrollers

Features

Power supply voltage: VDD = 3.0 to 3.6 V
Max. frequency 200 MHz
Internal memory Instruction RAM: 168 KB / Data RAM: 32 KB
Package: 176-pin plastic QFP (fine pitch) (24 x 24)
Number of instructions: 89
Minimum instruction execution time: 5.0 ns (at internal 200 MHz operation)
General-purpose registers: 32 bits x 32
Instruction set: V850E2 CPU
- Signed multiplication (16 bits x 16 bits -> 32 bits or 32 bits x 32 bits -> 64 bits): 1 clock
- Saturated operation instructions (with overflow/underflow detection function)
- 32-bit shift instructions: 1 clock
- Bit manipulation instructions
- Load/store instructions with long/short format
- Signed load instructions
- Sum-of-product instruction (MAC) (32 bits x 32 bits + 64 bits -> 64 bits)
Memory space: 512 MB linear address space (common program/data use)
- Chip select output function: 8 spaces
- Memory block division function: 2, 64 MB/block
- Programmable wait function
- Idle state insertion function
External bus interface:
- 32-bit data bus (address/data separated)
- 32-/16-/8-bit bus sizing function
- External bus division function: 1/1, 1/2, 1/4 (66 MHz MAX.)
- Bus hold function
- External wait function
- Address setup wait function
Instruction cache 8 KB 4-way set associative
Data cache 8 KB 4-way set associative
Interrupts/exceptions:
- External interrupts: 40 (including NMI)
- Internal interrupts: 59 sources
- Exceptions: 2 sources
- Eight levels of priorities can be set.
Memory access controller SDRAM controller (compatible with SDRAM) / Page ROM controller
DMA controller: 4 channels
- Transfer unit: 8 bits/16 bits/32 bits
- Maximum transfer count: 16,777,216 (224)
- Transfer type: Flyby (1-cycle)/2-cycle
- Transfer mode: Single/Single step/Block
- Transfer target: Memory <-> memory, memory <-> I/O
- Transfer request: External request/On-chip peripheral I/O/Software
- DMA transfer terminate (terminal count) output signal
- Next address setting function
- DMA channel priority: Fixed-priority mode/round-robin mode
I/O lines: Input ports: 1I/O ports: 77
Timer functions: - 16-bit timer/event counter: 6 channels (no capture operation for 2 channels) - 16-bit timers: 6 - 16-bit capture/compare registers: 12 - 16-bit interval timer: 4 channels - Up/down counter/timer for 16-bit 2-phase encoder input: 2 channels - 16-bit capture/compare registers: 4 - 16-bit compare registers: 4
Serial interfaces: - Asynchronous serial interface B (UARTB) and Clocked serial interface 3 (CSI3) available
- CSI3/UARTB: 1 channel
- UARTB: 1 channel
- CSI3: 1 channel
USB function controller (USBF):
- 1 channel Full speed (12 Mbps)
- Endpoint Control transfer: 64 bytes x 2
- Interrupt transfer: 8 bytes x 2
- Bulk transfer (IN): 64 bytes x 2 banks x 2
- Bulk transfer (OUT): 64 bytes x 2 banks x 2
A/D converter: 10-bit resolution A/D converter: 8 channels
PWM (Pulse Width Modulation): 16-bit resolution PWM: 2 channels
Clock generator: x 20 function using SSCG
Power-save function: HALT/IDLE mode
CMOS technology: All static circuits