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Advanced Memory Buffer

µPD720900 Supports Fully Buffered DIMM Interface

Overview

Complying with the latest-generation JEDEC standard for system memory, the µPD720900 Advanced Memory Buffer (AMB) works with SDRAM to implement high-capacity, high-throughput memory subsystems for applications such as servers and workstations. The µPD720900's SDRAM interface connects directly to DDR2-533, DDR2-667 and DDR2-800 devices. To support the JEDEC-standard, fully buffered DIMM (FB-DIMM), daisy-chained bus architecture, the µPD720900 provides FB-DIMM interfaces that enable 3.2-, 4.0- or 4.8-Gbps channel bit rates.

µPD720900 Supports Fully Buffered DIMM Interface

With these high-speed channels, the full-featured µPD720900 connects in a daisy chain with multiple AMB-based DIMMs and a host memory controller. As many as eight AMB devices can work seamlessly on each FB-DIMM channel, thus allowing use of very large memory capacities. The AMB smart interface accepts memory requests for its local DDR-2 SDRAM or forwards memory requests to other AMB-based DIMMs.

Applications

The µPD720900 AMB supports server, workstation, router and graphics controller applications with an industry-standard architecture that will become the mainstream server/workstation memory solution. These FB-DIMM memory subsystems offer reduced cost, greatly improved memory capacity and better signal integrity than existing stub-bus architectures. Designed to deliver on FB-DIMM's capabilities for extremely high reliability, the NEC Electronics µPD720900 AMB meets demanding application requirements for high-RAS (reliability/ availability/serviceability) systems.

Figure 1. µPD720900 Advanced Memory Buffer (AMB)

 µPD720900 Advanced Memory Buffer (AMB)
 

Features

  • Supports intelligent channel initialization procedures to align high-speed serial clocks, locate frame boundaries and verify channel connectivity
  • Supports forwarding of southbound and northbound frames
  • Detects FB-DIMM channel errors and reports them to the host memory controller
  • Fully supports the FB-DIMM configuration register set
  • Acts as DRAM memory buffer for all read, write and configuration accesses addressed to the DIMM
  • Provides a read-buffer FIFO and a write-buffer FIFO
  • Supports an SMBus protocol interface for access to the AMB configuration registers
  • Functions as a repeater for extending FB-DIMM links
  • Vcc:1.5V, Vddr:1.8V, Vdspd:3.3V
  • 655-pin FCBGA (0.8 mm pitch)
  • Includes a variety of high-reliability and testing features:
    • Support for all FB-DIMM failover modes, minimizing system down time
    • Transparent mode and direct access mode for DRAM testing
    • Logic to support MEMBIST, IBIST and virtual host mode design-for-test functions
    • Integrated thermal sensor and status indicator


Documentation